ECE407

Digital VLSI Systems Design
Fall 2015
Designation: 
Elective
Catalog Data: 

ECE 407 -- Digital VLSI Systems Design

Description: This course covers the fundamental techniques for the design, analysis and layout of digital CMOS circuits and systems. Major topics include: MOSFET basics (structure and behavior of a MOSFET, CMOS fabrication, and design rules); detailed analysis of the CMOS inverter (static behavior, ratioed vs. ratioless design); noise margins; computing rise and fall times; delay models; resistance and capacitance estimation; design and layout of static CMOS logic gates; dynamic CMOS logic design; sequential circuit design (static and dynamic sequential circuit elements, clocking schemes and clock optimization); and CMOS data path design.

Grading: Regular grades are awarded for this course: A B C D E

Prerequisite(s): 
ECE 274 and ECE 351C
Textbook(s): 

Rabaey, Jan, et al. Digital Integrated Circuits: A Design Perspective. 2nd Ed. Pearson. 2003.

Course Learning Outcomes: 

By the end of this course the student will be able to: 

  1. Use circuit simulator (i.e. SPICE) and layout editor (i.e. Cadence tool) to design inverters, adders, and latches.
  2. Apply static and dynamic design styles to implement combinational and sequential circuits.
  3. Understand Moore's law, yield, process variations, design robustness, leakage and time to market.
  4. Understand the tradeoffs among system performance, area consumption, and cost.
  5. Compare and evaluate different designs and understand the technology scaling issues.
  6. Formulate problems or model systems in device physics, signal processing, and related disciplines such as information, biology and biomedical engineering.
  7. Evaluate timing, reliability and flexibility of circuits and systems with different models.
Course Topics: 
  • Basic designs of static and dynamic CMOSinverters
  • Ratioed logic and pass transistor logic
  • Performance of dynamic logic and noise considerations in dynamic design
  • Static sequential circuits: flip-flop classification, master-slave and edge-triggered FF's
  • Dynamic sequential circuits: the pseudo-static latch, and the dynamic 2-phase flip-flop
  • Datapaths in digital processor architectures: the full adder, circuit design considerations, and the array multiplier
  • Interconnect issues with capacitive parasitics and reliability: crosstalk
  • Timing issues in sequential circuit designs
  • Memory classification, the memory core, memory architectures and building blocks
Class/Laboratory Schedule: 

Three, 50-minute lectures per week

Relationship to Student Outcomes: 

ECE 407 ECE 407 contributes directly to the following specific Electrical and Computer Engineering Student Outcomes of the ECE department:

  • an ability to apply knowledge of mathematics, science and engineering (Medium)
  • an ability to design and conduct experiments, as well as to analyze and interpret data (High)
  • an ability to design a system, component or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability and sustainability (High)
  • an ability to function on multi-disciplinary terms (Medium)
  • an ability to identify, formulate and solve engineering problems (High)
  • an understanding of professional and ethical responsibility (Medium)
  • a recognition of the need for, and an ability to engage in life-long learning (Medium)
  • an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice (High)
Prepared by: 
Dr. Janet M. Roveda
Prepared Date: 
3/17/16

University of Arizona College of Engineering