Fundamentals of Computer Organization
Fall 2015 and Spring 2016
Required for CE; Elective for EE
ECE 369 -- Fundamentals of Computer Organization (4 units)
Description: Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course qualitatively and quantitatively examines computer design trade-offs and teaches the fundamentals of computer architecture and organization, including CPU, memory, registers, arithmetic unit, control unit, and input/output components. Topics include reduced instruction set computer architectures (RISC); using the MIPS central processor as an example; interface between assembly and high level programming constructs and hardware; instruction and memory cache systems; performance evaluation; benchmarks; and use of the SPIM/WinDLX/Verilog Simulators for the MIPS architecture. For students who will continue in computer architecture, it lays the foundation of state-of-the-art techniques implemented in current and future high-performance computing platforms. For those students not continuing in computer architecture, it gives an overview of the kind of techniques used in today's microprocessors.
Grading: Regular grades are awarded for this course: A B C D E
Course Fee: $25
Patterson, D.A. and J.L. Hennessy. Computer Organization and Design: The Hardware/Software Interface. 4th ed. Morgan Kaufmann Publishers. 2011.
Course Learning Outcomes:
By the end of this course, the student will be able to:
- Understand the fundamentals of the computer architecture world.
- Explore computer architecture paradigm on their own.
- Articulate the design issues involved in the computer architecture both in theoretical and application levels.
- Design and implement single-cycle and pipelined datapaths for a given instruction set architecture.
- Evaluate the close relation between the instruction set architecture design, datapath design, and algorithm design .
- Understand the performance trade-offs involved in designing the memory subsystem including cache, main memory and virtual memory.
- Discuss the state of the art multicore architectures such as the NVIDIA Graphics Processing Unit.
- Evaluate the performance of a hypothetical architecture analytically.
- Computer Abstractions and Technology (4 lectures)
- Arithmetic for Computers (4 lectures)
- Instruction Sets and Software Systems (7 lectures)
- MIPS CPU and Control Unit Organization (8 lectures)
- Pipelining in MIPS CPU (6 lectures)
- Exploiting Memory Hierarchy (6 lectures)
- Storage and I/O (2 lectures)
- Multicores, Multiprocessors, and Clusters (4 lectures)
Three, 50-minute lectures per week
Two, 75-minute lab sessions per week
Relationship to Student Outcomes:
ECE 369A contributes directly to the following specific Electrical and Computer Engineering Student Outcomes of the ECE department:
- an ability to apply knowledge of mathematics, science and engineering (Medium)
- an ability to design and conduct experiments, as well as to analyze and interpret data (High)
- an ability to design a system, component, or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability and sustainability (High)
- an ability to identify, formulate and solve engineering problems (High)
- an ability to communicate effectively (Medium)
- a recognition of the need for, and an ability to engage in life-long learning (Low)
- a knowledge of contemporary issues (Medium)
- an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice. (High)